相对来说，聚焦轻资产的木鸟和美团，身段灵活，增长模式更轻便。这背后是另一种成本哲学。不以掌握所有环节为目标，核心目的是优化用户体验和房东运营，而非追求产业链控制。
今年 1 月，雷军在直播中再次提及，存储芯片价格按季度上涨，去年第四季度涨幅达 40%~50%，并预计今年第一季度将继续上涨，仅车用内存全年成本可能增加数千元。，详情可参考PDF资料
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The aarch64 instruction set has a madd instruction that performs integer multiply-adds. Cortex A725 and older Arm cores had dedicated integer multi-cycle pipes that could handle madd along with other complex integer instructions. Cortex X925 instead breaks madd into two micro-ops, and handles it with any of its four multiply-capable integer pipes. Likely, Arm wanted to increase throughput for that instruction without the cost of implementing three register file read ports for each multiply-capable pipe. Curiously, Arm’s optimization guide refers to the fourth scheduler’s pipes as “single/multi-cycle” pipes. “Multi-cycle” is now a misnomer though, because the core’s “single-cycle” integer pipes can handle multiplies, which have two cycle latency. On Cortex X925, “multi-cycle” pipes distinguish themselves by handling special operations and being able to access FP/vector related registers.